%FILENAME%
iverilog-13.0-1.1-x86_64_v4.pkg.tar.zst

%NAME%
iverilog

%BASE%
iverilog

%VERSION%
13.0-1.1

%DESC%
Icarus Verilog compiler and simulation tool

%CSIZE%
2482284

%ISIZE%
7596188

%SHA256SUM%
9ad28ce779b8b7ccfe07bf5ae203b1782d5df2586c49cd7f53f0670b52b4ff58

%PGPSIG%
iQGzBAABCgAdFiEEiC3P5I4gUdSOJWKr87YHSI2zWkcFAmmlU/IACgkQ87YHSI2zWkc6rQv+NFFULuYipva1ua+RGrjf2txfy+mBt9pjlmg7hiwu/HgLNSDKKalXWGbqOIJ1/ry3hcg/UuOfgEw3bZpluTygW9y0Jt9aidPjFUPi2e5ah9jxZQ2tnGuBEwN8WhmR8eXHfAXe+T4CPBZx7zKa11FI/ZfacbWJwSHKAZrT11XUtBBDKZvdyqhavC0e8164uCR16Pl4N4IdwPY4x8lSZOh3Ai/6NxDGLaYfSuP9euVs4kwwVV/E6Mdv4AlG/A8xp6UNi3ULKS+0z2OMNOpWe69Ky4Hb/Zmq5WS9cUbKUM9YOivq+QmOrS4e+mVTwG9hbP4EfztjF1r8TujaTpLP5Imwl3yZToAKU8jLzkAGMb0to9a2bKGCN2xspMXXhecG7YXAuk1/Ket3UeKoXn56JMvWuLb6/ySIozRLIfcKMa7Hs4dFOnwqUFzvs0vW5fBQLWWQ6Y5ZJZd1nxJi0Jt0o57xyevBOcuhW3SP6j7gM+42tMtASdULDDa2d/J1/+6tHbDX

%URL%
https://github.com/steveicarus/iverilog

%LICENSE%
GPL

%ARCH%
x86_64_v4

%BUILDDATE%
1772442563

%PACKAGER%
CachyOS <admin@cachyos.org>

%DEPENDS%
bzip2
zlib

%MAKEDEPENDS%
git
gperf

